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Patent # Description
US-1,006,8944 Bending semiconductor chip in molds having radially varying curvature
Techniques for fabricating a semiconductor chip having a curved surface include placing a substantially flat photonic sensor chip on a recessed surface of a...
US-1,006,8943 Radiation imaging apparatus and radiation imaging system
Provided is a radiation imaging apparatus, including: a plurality of pixels configured to output image signals corresponding to radiation; an image signal line...
US-1,006,8942 Photodiode array having a charge-absorbing doped region
The invention concerns a photodiode array, and the method for producing same, comprising--a cathode comprising at least one substrate layer (4) made from a...
US-1,006,8941 Image pickup device and method for manufacturing the same
An insulating liner layer has an extra-pixel removal region located outside a pixel region in a region of a vertical angle of at least one of four corners of...
US-1,006,8940 Imaging apparatus with focus-ranging precision in one direction due to saturated photoelectric conversion...
An imaging apparatus includes a micro lens, a second photoelectric conversion element that is located adjacent to a first photoelectric conversion element in a...
US-1,006,8939 Solid-state imaging device, manufacturing method thereof, and camera with arranged pixel combinations alternatively
A solid-state imaging device includes a semiconductor substrate; and a pixel unit having a plurality of pixels on the semiconductor substrate, wherein the pixel...
US-1,006,8938 Solid image-pickup device with flexible circuit substrate
A solid image-pickup device has a semiconductor substrate, which includes an image-pickup area having a plurality of light sensors arranged thereon. A...
US-1,006,8937 Image sensor and method for fabricating the same
This technology relates to an image sensor. The image sensor may include a substrate including a photoelectric conversion element; a pillar formed over the...
US-1,006,8936 Printed circuit board assembly forming enhanced biometric module and manufacturing method thereof
A Printed Circuit Board Assembly (PCBA) for forming an enhanced biometric module and a method for manufacturing the PCBA are disclosed. The method includes the...
US-1,006,8935 Image lag free pixel
A CMOS image sensor pixel (200) comprising a photosensitive element (101) for generating a charge in response to incident light; a plurality of charge storage...
US-1,006,8934 Electromagnetic wave detector and electromagnetic wave detector array
An electromagnetic wave detector includes: a substrate; an insulating layer provided on the substrate; a graphene layer provided on the insulating layer; a pair...
US-1,006,8933 Array substrate manufacturing method and array substrate
The present invention provides an array substrate manufacturing method and an array substrate. The array substrate manufacturing method of the present invention...
US-1,006,8932 Display device
A display device for improving an aperture ratio of the pixel is provided. In the display device, a transparent oxide layer, an insulating film, and a...
US-1,006,8931 Hollowed electronic display
Presented here are manufacturing techniques to create an irregularly shaped electronic display, including a hollow within which a sensor, such as a camera, can...
US-1,006,8930 Display device
A display device comprising a first electrode that comprises a first region, a second region, and a third region located between the first region and the second...
US-1,006,8929 Display device
A display device can include a substrate including a display area, on which an input image is displayed, and a pad part including a convex portion and a concave...
US-1,006,8928 Display device
A display device includes: a scan line extending in a first direction; first, second and third signal lines extending in a second direction; a first sub-pixel...
US-1,006,8927 Semiconductor device, display module, and electronic device
A semiconductor device includes a MEMS device, a first transistor that supplies a first voltage to a first electrode of the MEMS device, a second transistor...
US-1,006,8926 Semiconductor device and method for manufacturing the same
A semiconductor device includes a pixel electrode and a transistor which includes a first gate electrode, a first insulating layer over the first gate...
US-1,006,8925 Thin film transistor, thin film transistor panel, and method for manufacturing the same
A thin film transistor includes a gate electrode, a semiconductor layer, a source electrode, and a drain electrode. The semiconductor layer overlaps the gate...
US-1,006,8924 Display panel and display apparatus
An embodiment of the present invention provides a display panel including a first substrate; a device layer disposed on the first substrate, wherein the device...
US-1,006,8923 Transparent display device and method of manufacturing the same
A transparent display device includes a base substrate having a pixel area and a transmission area, a barrier layer disposed on the base substrate, a pixel...
US-1,006,8922 FinFET devices with multiple channel lengths
A continuous fin having a first segment and a second segment in a semiconductor layer, the first segment is arranged at an angle relative to the second segment,...
US-1,006,8921 Integrated circuits with self aligned contact structures for improved windows and fabrication methods
Devices and methods for forming semiconductor devices with self aligned contacts for improved process windows are provided. One method includes, for instance:...
US-1,006,8920 Silicon germanium fins on insulator formed by lateral recrystallization
Relaxed silicon germanium fins are formed on a bulk silicon substrate through the lateral recrystallization of molten silicon germanium having high germanium...
US-1,006,8919 Semiconductor device and method of forming the same
A semiconductor device and a method of forming the same, the semiconductor device includes a first transistor and a second transistor. The first transistor is...
US-1,006,8918 Contacting SOI subsrates
An integrated circuit is provided including a semiconductor bulk substrate, a buried oxide layer formed on the semiconductor bulk substrate, a plurality of...
US-1,006,8917 Vertical memory devices and methods of manufacturing the same
A vertical memory device includes insulating interlayer patterns, of gate electrodes, a channel, and a charge storage pattern structure. The insulating...
US-1,006,8916 Semiconductor memory device with a three-dimensional stacked memory cell structure
A semiconductor memory device comprises: a semiconductor substrate; a plurality of memory units provided on the semiconductor substrate and each including a...
US-1,006,8915 Manufacturing method for a semiconductor device including resist films different in thickness
According to one embodiment, a semiconductor device includes a stacked body of N (N is an integer of 2 or more) layers stacked on a semiconductor substrate and...
US-1,006,8914 Semiconductor structure and manufacturing method of the same
A semiconductor structure and a manufacturing method of the same are provided. The semiconductor structure includes a substrate, a plurality of conductive...
US-1,006,8913 Three dimensional semiconductor devices
A three-dimensional semiconductor device includes a semiconductor substrate including a cell array region and a peripheral circuit region, an electrode...
US-1,006,8912 Method of reducing charge loss in non-volatile memories
A memory apparatus that has at least two non-volatile memory (NVM) cells disposed side by side overlying a substrate and an isolation structure disposed between...
US-1,006,8911 Semiconductor device
According to one embodiment, a semiconductor device includes a stacked body, a columnar portion, a first charge storage portion, and a second charge storage...
US-1,006,8910 Non-volatile semiconductor memory device
Provided is a small-area one-time programmable semiconductor memory device that uses a PNPN structure, which is parasitically generated in a CMOS process. An...
US-1,006,8909 Layout pattern of a memory device formed by static random access memory
The present invention provides a layout pattern of a memory device composed of static random access memory (SRAM), comprising four memory units located on a...
US-1,006,8908 Method to form localized relaxed substrate by using condensation
Methods and structures for forming a localized, strained region of a substrate are described. Trenches may be formed at boundaries of a localized region of a...
US-1,006,8907 Dynamic random access memory
A dynamic random access memory (DRAM) includes a substrate, two buried word lines and a bit line contact. The substrate includes a first active area, wherein...
US-1,006,8906 Semiconductor device including oxide semiconductor transistors with low power consumption
The semiconductor device of the present invention comprises first and second transistors and first and second capacitors. One of source and drain electrodes of...
US-1,006,8905 Apparatus for FinFETs
A device comprises a first inverter comprising a first p-type transistor (PU) and a first n-type transistor (PD), a second inverter cross-coupled to the first...
US-1,006,8904 Semiconductor device
A semiconductor device includes first and second active regions and a field insulating film contacting between the first and second active regions, and a gate...
US-1,006,8903 Methods and apparatus for artificial exciton in CMOS processes
Methods and apparatus for artificial exciton devices. An artificial exciton device includes a semiconductor substrate; at least one well region doped to a first...
US-1,006,8902 Integrated circuit structure incorporating non-planar field effect transistors with different channel region...
Disclosed is a method of forming an integrated circuit (IC) structure with multiple non-planar transistors having different effective channel widths. In the...
US-1,006,8901 Semiconductor device including transistors with different threshold voltages
A semiconductor device including a substrate includes a first region and a second region and first and second transistors in the first and second regions,...
US-1,006,8900 Semiconductor device with dummy pattern in high-voltage region and method of forming the same
A semiconductor device includes a substrate having a high-voltage (HV) region; HV gate structures formed in the HV region of the substrate; a HV dummy pattern...
US-1,006,8899 IC structure on two sides of substrate and method of forming
An integrated circuit (IC) structure uses a single semiconductor substrate having a first side and an opposing, second side. A first plurality of active devices...
US-1,006,8898 On-chip MIM capacitor
A method for forming an on-chip capacitor with complementary metal oxide semiconductor (CMOS) devices includes forming a first capacitor electrode between gate...
US-1,006,8897 Shallow trench isolation area having buried capacitor
A method of forming a semiconductor device includes providing a semiconductor substrate including a source/drain region, an active transistor region, and a...
US-1,006,8896 Electrostatic discharge protection device and manufacturing method thereof
An ESD protection device includes a semiconductor substrate, a well, a gate structure, a first source/drain region, a second source/drain region, a first doped...
US-1,006,8895 Transistors patterned with electrostatic discharge protection and methods of fabrication
High-voltage semiconductor devices with electrostatic discharge (ESD) protection and methods of fabrication are provided. The semiconductor devices include a...
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