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Patent # Description
US-1,006,8657 Detecting misalignment in memory array and adjusting read and verify timing parameters on sub-block and block...
A memory device and associated techniques adjust voltage ramping times optimally for each block or sub-block of memory cells to account for fabrication...
US-1,006,8656 Non-volatile memory with multi-pass programming
A non-volatile memory system implements a multi-pass programming process that includes separately programming groups of memory cells in a common block by...
US-1,006,8655 Inferring threshold voltage distributions associated with memory cells via interpolation
Apparatuses and methods for inferring threshold voltage distributions associated with memory cells via interpolation are described herein. A number of...
US-1,006,8654 NAND flash memory
Serial NAND flash memory may be provided with the characteristics of continuous read of the memory across page boundaries and from logically contiguous memory...
US-1,006,8653 Methods of operating memory
Methods of operating memory include generating a data value indicative of a level of a property sensed from a data line while applying potentials to control...
US-1,006,8652 Apparatuses and methods for determining population count
The present disclosure includes apparatuses and methods related to determining population count. An example apparatus comprises an array of memory cells coupled...
US-1,006,8651 Channel pre-charge to suppress disturb of select gate transistors during erase in memory
A memory device and associated techniques avoid a disturb of a select gate transistor during an erase operation. A pre-charge operation occurs in which a...
US-1,006,8650 Characterizing and operating a non-volatile memory device
A sequence of contiguous pages in an erase block in a non-volatile memory device is programmed and erased. Next, all of the pages in the erase block are...
US-1,006,8649 Apparatuses and methods for performing multiple memory operations
The disclosed technology relates to a memory device configured to perform multiple access operations in response to a single command received through a memory...
US-1,006,8648 Distributed mode registers in memory devices
A semiconductor device may include a plurality of memory banks, a plurality of mode registers that may control an operational mode associated with each of the...
US-1,006,8647 Semiconductor memory device
A semiconductor memory device includes a first block that includes a first set of word lines, a second block that includes a second set of word lines and is...
US-1,006,8646 Semiconductor device including TCAM cell arrays capable of skipping TCAM-cell search in response to control signal
The consumption current of a TCAM device is reduced. A semiconductor device includes multiple sub-arrays each including a TCAM cell array. Each sub-array...
US-1,006,8645 Multiple cycle search content addressable memory
In an aspect of the disclosure, a method and an apparatus are provided. The apparatus may be a content addressable memory. The content addressable memory...
US-1,006,8644 System and method for adjusting EEPROM write cycle duration according to supply voltage variation
A method of controlling a cycle for writing at least one data item to at least one memory slot of the electrically programmable and erasable read-only memory...
US-1,006,8643 Sense amplifier for non-volatile memory devices and related methods
A memory device includes an array of phase-change memory (PCM) cells and complementary PCM cells. A column decoder is coupled to the array of PCM cells and...
US-1,006,8642 Memory device and control method thereof
A memory device includes a control circuit configured to (i) start a first application of a first voltage between a first conductive layer and a third...
US-1,006,8641 Semiconductor storage device
A semiconductor storage device includes an SRAM memory cell composed of a drive transistor, a transfer transistor and a load transistor, an I/O circuit that is...
US-1,006,8640 Semiconductor device, electronic component, and electronic device
A memory in which a write cycle time is longer than time for one clock cycle can be mounted on a processor. The processor includes a processor core, a bus, and...
US-1,006,8639 Out-of-place presetting based on indirection table
An aspect of this invention is a method for providing a PreSET region in a memory device wherein the PreSET region includes one or more lines of the memory...
US-1,006,8638 Apparatus with low power SRAM retention mode
A memory array and an integrated circuit are disclosed. The memory array includes first and second banks of memory elements and five switches. Each memory...
US-1,006,8637 Semiconductor device having PDA function
A method for writing a mode register in a semiconductor device, the method includes receiving a mode register command and a mode signal; generating a first mode...
US-1,006,8636 Apparatuses and methods for accessing and scheduling between a plurality of row buffers
The present disclosure relates to a dynamic random access memory (DRAM) array, which comprises a plurality of bit lines connectable, respectively, to at least...
US-1,006,8635 Memory device including delay circuit having gate insulation films with thicknesses different from each other
Provided is a memory device including a delay circuit having gate insulation films with thicknesses different from each other. The memory device includes a...
US-1,006,8634 Simultaneous write and read calibration of an interface within a circuit
To calibrate an electronic circuit, a calibration controller tests the electronic circuit with an initial separate read check allowing for a read delay and with...
US-1,006,8633 Semiconductor devices and integrated circuits including the same
An integrated circuit may include a first semiconductor device and a second semiconductor device. The first semiconductor device may be configured to output a...
US-1,006,8632 Semiconductor device and semiconductor system
A semiconductor system includes a semiconductor device suitable for not performing an internal refresh operation when entering a self-refresh mode in response...
US-1,006,8631 Dual mode memory array security apparatus, systems and methods
Read-only ("RO") data consisting of a physically unclonable function ("PUF") pattern is written to a ferroelectric random-access memory ("FRAM") memory array....
US-1,006,8630 Non-volatile ferroelectric memory cells with multilevel operation
Ferroelectric components, such as the ferroelectric field effect transistors (FeFETs), ferroelectric capacitors and ferroelectric diodes described above may be...
US-1,006,8629 Ferroelectric memory cell sensing
Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. A memory device may maintain a digit line voltage at a ground...
US-1,006,8628 Apparatus for low power write and read operations for resistive memory
Apparatuses for improving resistive memory energy efficiency are provided. An apparatus performs data-driven write to make use of asymmetric write switch energy...
US-1,006,8627 Semiconductor integrated circuit including CAS latency setting circuit
A semiconductor memory apparatus includes a CAS latency setting circuit configured to change an initially-set CAS latency value in response to control signal...
US-1,006,8626 Clocked commands timing adjustments in synchronous semiconductor integrated circuits
A clock timing adjust circuit is incorporated in a clocked integrated circuit to detect an input clock frequency and to adjust the timing latency of an internal...
US-1,006,8625 Buffer memory device and display drive device
A buffer memory and display drive device are described herein. In one example, a buffer memory is arranged so that write and read address counters are...
US-1,006,8624 Electronic device and operating method thereof
According to an embodiment, a storage device may be provided. The storage device may include a semiconductor memory device, and a memory controller configured...
US-1,006,8623 Apparatuses and methods for compensating for process, voltage, and temperature variation in a memory
Systems and methods are described for compensating for variations in process, voltage, temperature, or combinations thereof in an apparatus. An example...
US-1,006,8622 Base unit and disk drive apparatus
A base member includes a recessed portion arranged to extend in radial directions and recessed upward from a lower surface of the base member, the radial...
US-1,006,8621 Electronic apparatus
An electronic apparatus includes a plurality of parts, a frame having an outer periphery surrounding the plurality of parts and formed from resin, a circuit...
US-1,006,8620 Affective sound augmentation for automotive applications
In order to affect the mood of a vehicle operator (for example, to increase attentiveness), embodiments of the invention automatically sequence appropriate...
US-1,006,8619 Hand held storage device
A hand held data storage apparatus includes a disk-based storage device, an interface configured for data transfer with the storage device, and an enclosure...
US-1,006,8618 Electronic apparatus and hard disk drive holder
Disclosed herein is an electronic apparatus including a main body, a compartment provided in the main body, a part that is accommodated in the compartment and...
US-1,006,8617 Adding content to a media timeline
Techniques are provided for associating comments with certain positions within a video (or audio) timeline. Multiple users compose comments, such as questions,...
US-1,006,8616 Thumbnail generation for video
According to one implementation, a video processing system for performing thumbnail generation includes a computing platform having a hardware processor and a...
US-1,006,8615 Capture execution/non-execution control device, capture execution/non-execution control method, program, and...
A capture execution/non-execution control device includes a display controller that carries out control to cause an image generated through execution of a...
US-1,006,8614 Video service with automated video timeline curation
The subject disclosure is directed towards a technology in which highlight (curated) videos are automatically generated for users to watch based upon estimated...
US-1,006,8613 Intelligent selection of scene transitions
Techniques related to intelligent selection of scene transitions are disclosed. In some example embodiments, a sequence of video segments may be received as...
US-1,006,8612 Systems and methods for generating and presenting virtual experiences
Various embodiments facilitate the creation and presentation of a virtual experience. In one embodiment, the virtual experience is assembled from user model...
US-1,006,8611 Systems and methods for dynamic audio processing
Systems and methods presented herein may provide for processing audio with increased loudness and dynamics. A first clock frequency associated with a digital...
US-1,006,8610 Motion detection for A/V recording and communication devices
Audio/video (A/V) recording and communication devices according to the present embodiments comprise a processor, a motion sensor, and a camera. In various...
US-1,006,8609 Variable frequency write pattern generation
In some implementations, a system includes a magnetic media disk and a read/write unit. The read/write unit includes a plurality of phase-locked loops (PLLs),...
US-1,006,8608 Multi-stage MISO circuit for fast adaptation
Systems and methods are disclosed for applying multi-stage multiple input single output (MISO) circuits for fast adaptation. An apparatus may comprise a first...
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