Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching:





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
US-1,007,4601 Wiring substrate and semiconductor device
A wiring substrate includes a first wiring layer, an insulative resin first insulation layer covering the first wiring layer, and a second wiring layer located...
US-1,007,4600 Method of manufacturing interposer-based damping resistor
Various resistor circuits and methods of making and using the same are disclosed. In one aspect, a method of manufacturing is provided that includes forming a...
US-1,007,4599 Semiconductor dies with recesses, associated leadframes, and associated systems and methods
Semiconductor dies with recesses, associated leadframes, and associated systems and methods are disclosed. A semiconductor system in accordance with one...
US-1,007,4598 Semiconductor device and manufacturing method thereof
A lead frame includes a plurality of circuit patterns which each have a die pad and an electrode terminal portion and are disposed in a band shape, a tie bar, a...
US-1,007,4597 Interdigit device on leadframe for evenly distributed current flow
The disclosure is directed to techniques to evenly distribute current in interdigited leadframes by decoupling current between interdigited pads. The leadframe...
US-1,007,4596 Method of fabricating a lead frame by additive process
An electronic component, such as an integrated circuit, includes at least one circuit having coupled therewith electrical connections including a lead frame of...
US-1,007,4595 Self-alignment for redistribution layer
An apparatus comprising a substrate with multiple electronic devices. An interconnect structure formed on a first side of the substrate interconnects the...
US-1,007,4594 Semiconductor structure and manufacturing method thereof
A semiconductor structure includes a substrate including a first side, a second side opposite to the first side, and a device layer over the second side, and a...
US-1,007,4593 Shunt resistor integrated in a connection lug of a semiconductor module and method for determining a current...
A semiconductor module includes a housing, a circuit carrier having an insulation carrier and a metallization layer applied to a side of the insulation carrier,...
US-1,007,4592 Pedestal surface for MOSFET module
An electronic package connectable to an electric machine includes a cooling tower having a metallic wall with a radially outer wall surface. The radially outer...
US-1,007,4591 System with provision of a thermal interface to a printed circuit board
Embodiments of the present disclosure provide techniques and configurations for providing a thermal interface to a PCB. In some embodiments, the system for...
US-1,007,4590 Molded package with chip carrier comprising brazed electrically conductive layers
A package which comprises a chip carrier, at least one electronic chip mounted on the chip carrier, an electrically conductive contact structure electrically...
US-1,007,4589 Embedding diamond and other ceramic media into metal substrates to form thermal interface materials
A multi-layer structure includes a substrate with a surface and with particles partially covering and partially embedded in the surface. The particles have high...
US-1,007,4588 Semiconductor devices with a thermally conductive layer and methods of their fabrication
An embodiment of a semiconductor device includes a semiconductor substrate that includes a host substrate and an upper surface, an active area, a substrate...
US-1,007,4587 Bonding wire-type heat sink structure for semiconductor devices
The present invention discloses a bonding-wire-type heat sink structure for semiconductor devices. An embodiment of the said bonding-wire-type heat sink...
US-1,007,4586 Thermal dissipation device and semiconductor package device including the same
A thermal dissipation device includes a main body and a support member. The main body has an upper surface, a lower surface opposite to the upper surface, and a...
US-1,007,4585 Power module with dummy terminal structure
A power module includes a connection terminal for external connection, the connection terminal protruding from the side surface of a package, and a dummy...
US-1,007,4584 Method of forming a semiconductor component comprising a second passivation layer having a first opening...
A conductive feature on a semiconductor component is disclosed. A first passivation layer is formed over a substrate. A bond pad is formed over the first...
US-1,007,4583 Circuit module and manufacturing method thereof
There is provided a circuit module where a sufficient amount of underfill resin may be supplied to corner portions of a semiconductor chip. A circuit module...
US-1,007,4582 Sealing sheet
Provided is a sealing sheet capable of preventing void and filler segregation from occurring when forming a sealing body in which semiconductor chips are buried...
US-1,007,4581 Chip package having a patterned conducting plate and a conducting pad with a recess
A chip package includes a patterned conducting plate having a plurality of conducting sections electrically separated from each other, a plurality of conducting...
US-1,007,4580 Method to use on-chip temperature sensors for detection of Trojan circuits
A method for detecting a malicious circuit on an integrated circuit chip is provided, in which temperature sensors are thermally coupled to primary circuitry on...
US-1,007,4579 Stacked semiconductor device
A stacked semiconductor device may include: a base die; and a plurality of core dies stacked over the base die, and suitable for communicating with allocated...
US-1,007,4578 Semiconductor device and method for producing the same
Provided is a semiconductor device capable of measuring a depth of removal of a silicon carbide (SiC) wafer with high accuracy through simple steps, and a...
US-1,007,4577 Silicon germanium and silicon fins on oxide from bulk wafer
A method for forming fins includes growing a SiGe layer and a silicon layer over a surface of a bulk Si substrate, patterning fin structures from the silicon...
US-1,007,4576 Semiconductor memory device
A semiconductor device including a circuit that has a reduced area is provided. Alternatively, a semiconductor device including a circuit that can have a...
US-1,007,4575 Integrating and isolating nFET and pFET nanosheet transistors on a substrate
Embodiments of the invention are directed to methods of fabricating nanosheet channel field effect transistors. An example method includes forming a first...
US-1,007,4574 Integrated circuit with replacement gate stacks and method of forming same
A first aspect of the invention provides for a method including: forming an interfacial layer in a first opening in a pFET region and a second opening in an...
US-1,007,4573 CMOS nanowire structure
Complimentary metal-oxide-semiconductor nanowire structures are described. For example, a semiconductor structure includes a first semiconductor device. The...
US-1,007,4572 Integrated circuit devices and methods of manufacturing the same
An integrated circuit device includes first and second fin-type active regions having different conductive type channel regions, a first device isolation layer...
US-1,007,4571 Device with decreased pitch contact to active regions
A fin cut process cuts semiconductor fins after forming sacrificial gate structures that overlie portions of the fins. Selected gate structures are removed to...
US-1,007,4570 3D vertical FET with top and bottom gate contacts
A semiconductor device includes a vertical transistor having a gate structure disposed about a channel region thereof. The vertical transistor has a top side...
US-1,007,4569 Minimize middle-of-line contact line shorts
Semiconductor structures and methods of forming such structures are disclosed. In an embodiment, the semiconductor structure comprises a substrate, a dielectric...
US-1,007,4568 Electronic devices and systems, and methods for making and using same
Some structures and methods to reduce power consumption in devices can be implemented largely by reusing existing bulk CMOS process flows and manufacturing...
US-1,007,4567 Method and system for vertical integration of elemental and compound semiconductors
A method of fabricating a semiconductor structure includes providing an engineered substrate including a polycrystalline substrate, a barrier layer...
US-1,007,4566 Semiconductor device and methods for forming a plurality of semiconductor devices
A method for forming a plurality of semiconductor devices includes forming a plurality of trenches extending from a first lateral surface of a semiconductor...
US-1,007,4565 Method of laser processing for substrate cleaving or dicing through forming "spike-like" shaped damage structures
This invention provides an effective and a method of laser processing for separating semiconductor devices formed on a single substrate (6) or separating high...
US-1,007,4564 Self-aligned middle of the line (MOL) contacts
Disclosed are methods and integrated circuit (IC) structures. The methods enable formation of a gate contact on a gate above (or close thereto) an active region...
US-1,007,4563 Structure and formation method of interconnection structure of semiconductor device
Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a gate stack over a semiconductor...
US-1,007,4562 Self aligned contact structure
Embodiments of present invention provide a method of forming a semiconductor structure. The method includes forming a semiconductor structure having a first...
US-1,007,4561 Backside contact to a final substrate
A device structure is formed using a silicon-on-insulator substrate. The device structure includes a first switch and a second switch that are formed using a...
US-1,007,4560 Method of manufacturing semiconductor device
A method of manufacturing a semiconductor device includes forming an insulating pattern layer on a substrate, conformally forming a first conductive layer with...
US-1,007,4559 Selective poreseal deposition prevention and residue removal using SAM
Methods of discouraging poreseal deposition on metal (e.g. copper) at the bottom of a via during a poresealing process are described. A self-assembled monolayer...
US-1,007,4558 FinFET structure with controlled air gaps
The present disclosure provides a method that includes forming an isolation feature in a semiconductor substrate; forming a first fin and a second fin on the...
US-1,007,4557 Pattern forming method
A first film having a repetitive line pattern is formed on an under film. A second film is formed on a side surface of the first film. The second film has an...
US-1,007,4556 Method of manufacturing semiconductor device
A method of manufacturing a semiconductor device includes the steps of forming a plurality of gate electrodes, forming a first insulating film over the...
US-1,007,4555 Non-contact substrate processing
Embodiments of the present invention provide apparatus and methods for supporting, positioning or rotating a semiconductor substrate during processing. One...
US-1,007,4554 Workpiece loader for a wet processing system
Techniques herein provide a workpiece handling and loading apparatus for loading, unloading, and handling relatively flexible and thin substrates for transport...
US-1,007,4553 Wafer level package integration and method
In a wafer level chip scale package, a wafer level interconnect structure is formed on a dummy substrate with temperatures in excess of 200.degree. C. First...
US-1,007,4552 Method of manufacturing electrostatic chuck having dot structure on surface thereof
A method of manufacturing an electrostatic chuck includes providing a dielectric substrate having a surface which is constituted by a bottom face, and a...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.