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Patent # Description
US-1,007,3797 Data processor device supporting selectable exceptions and method thereof
A processor begins exception processing in response to an exception event. Exception processing by the processor is halted during exception processing to...
US-1,007,3796 Sending packets using optimized PIO write sequences without SFENCES
Method and apparatus for sending packets using optimized PIO write sequences without sfences. Sequences of Programmed Input/Output (PIO) write instructions to...
US-1,007,3795 Data compression engine for I/O processing subsystem
In a system and method for emulating a circuit design, an emulation system receives input instructions from a host device executing the emulation and returns...
US-1,007,3794 Mobile application builder program and its functionality for application development, providing the user an...
A mobile "Applications Builder" established on the user's mobile handheld device creates a bucket or container for mobile applications (Apps) and selectively...
US-1,007,3793 Data processor
A data processor includes an access target with the address assigned to a memory space, an access subject that gains access to the access target while...
US-1,007,3792 Device, system, and method for detecting, identifying, and communicating with a storage medium
A device includes: a storage medium control unit provided for each type of storage medium to at least read out information from the storage medium; a linkage...
US-1,007,3791 Securing files
Data security access and management may require a server dedicated to monitoring document access requests and enforcing rules and policies to limit access to...
US-1,007,3790 Electronic system with memory management mechanism and method of operation thereof
An electronic system includes: a processor configured to access operation data; a high speed local memory, coupled to the processor, configured to store a...
US-1,007,3789 Method for load instruction speculation past older store instructions
A system includes a memory, a cache including multiple cache lines; and a processor. The processor may be configured to retrieve, from a first cache line, a...
US-1,007,3788 Information processing device and method executed by an information processing device
An information processing device includes a first memory and a processor configured to receive first data from the second memory, receive second data from the...
US-1,007,3787 Dynamic powering of cache memory by ways within multiple set groups based on utilization trends
A set associative cache memory comprises an M.times.N memory array of storage entries arranged as M sets by N ways, both M and N are integers greater than one....
US-1,007,3786 Apparatuses and methods for compute enabled cache
The present application includes apparatuses and methods for compute enabled cache. An example apparatus includes a compute component, a memory and a controller...
US-1,007,3785 Up/down prefetcher
In a processing system comprising a cache, a method includes monitoring demand cache accesses for a thread to maintain a first running count of a number of...
US-1,007,3784 Memory performance when speculation control is enabled, and instruction therefor
Throttling execution in a transaction operating in a processor configured to execute memory instructions out-of-program-order in a pipelined processor, wherein...
US-1,007,3783 Dual mode local data store
A system and method for efficiently processing access requests for a shared resource are described. Each of many requestors are assigned to a partition of a...
US-1,007,3782 Memory unit for data memory references of multi-threaded processor with interleaved inter-thread pipeline in...
A memory unit for handling data memory references of a multi-threaded processor with interleaved inter-thread pipeline in emulated shared memory architectures,...
US-1,007,3781 Systems and methods for invalidating directory of non-home locations ways
Systems and methods for invalidating a way of a directory for non-home locations (DNHL) set that stores an identifier of a home location of an address is...
US-1,007,3780 Methods and systems for tracking addresses stored in non-home cache locations
Systems and methods for tracking addresses stored in non-home locations in a cache. A method includes determining if an address that is to be stored in a cache...
US-1,007,3779 Processors having virtually clustered cores and cache slices
A processor of an aspect includes a plurality of logical processors each having one or more corresponding lower level caches. A shared higher level cache is...
US-1,007,3778 Caching in multicore and multiprocessor architectures
A multicore processor comprises a plurality of cache memories, and a plurality of processor cores, each associated with one of the cache memories. Each of at...
US-1,007,3777 Region identifying operation for identifying a region of a memory attribute unit corresponding to a target...
A data processing apparatus has a memory attribute unit having storage regions for storing attribute data for controlling access to a corresponding memory...
US-1,007,3776 Shadow tag memory to monitor state of cachelines at different cache level
A processing system includes a plurality of processor cores and a plurality of private caches. Each private cache is associated with a corresponding processor...
US-1,007,3775 Apparatus and method for triggered prefetching to improve I/O and producer-consumer workload efficiency
An apparatus and method are described for a triggered prefetch operation. For example, one embodiment of a processor comprises: a first core comprising a first...
US-1,007,3774 Managing input/output operations for shingled magnetic recording in a storage system
A system and method for improving the management of data input and output (I/O) operations for Shingled Magnetic Recording (SMR) devices in a network storage...
US-1,007,3773 Instruction paging in reconfigurable fabric
Circular buffers containing instructions that enable the execution of operations on logical elements are described where data in the circular buffers is swapped...
US-1,007,3772 Copy-on-write in cache for ensuring data integrity in case of storage system failure
Various embodiments for managing data integrity in a computing storage environment, by a processor device, are provided. In one embodiment, a method comprises...
US-1,007,3771 Data storage method and system thereof
A data storage method and a system thereof are disclosed. The data storage method includes allocating a first logical block and a second logical block, which...
US-1,007,3770 Scheme for determining data object usage in a memory region
Method and apparatus for managing memory is disclosed herein. In one embodiment, the method includes specifying a first load-monitored region within a memory,...
US-1,007,3769 Data storage device and data maintenance method thereof
The present invention provides a data storage device including a random access memory and a controller. The random access memory has a cache area. The...
US-1,007,3768 Smart migration/remediation engine
A Post Migration platform that has a Remediation Engine that checks for errors and warnings in the generated code from the source code, both in a different...
US-1,007,3767 Trace Management
Systems, methods, and computer program products for trace management in a distributed computing environment are described. A trace manager receives a request to...
US-1,007,3766 Building signatures of application flows
An example device in accordance with an aspect of the present disclosure includes a screen identification engine to identify a screen(s) of a test run, an...
US-1,007,3765 Method and system of testing software using real time replication
Method and system of testing software using real time replication. At least some illustrative examples include interacting by a human tester with a first...
US-1,007,3764 Method for instruction sequence execution analysis and visualization
Various technologies pertaining to computer-executable instruction sequence forensics are described herein. In a general embodiment, an application development...
US-1,007,3763 Touchless testing platform
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for a touchless testing platform employed to, for example,...
US-1,007,3762 Debug device, debug method, and debug program
A debug device to more accurately compute current consumption or a current consumption quantity from a computer program to be executed in a mobile terminal when...
US-1,007,3761 Legacy system
An example method for creating and operating a mobile application for an existing legacy system is provided in accordance with an aspect of the present...
US-1,007,3760 System and method for troubleshooting software configuration problems using application tracing
In a general aspect, a tracer is configured to instrument an application by injecting at least one interrupt instruction at a function entry point in a memory...
US-1,007,3759 Identification and handling of nested breakpoints during debug session
Provided are techniques for identification and handling of nested breakpoints during debug session. Program code having functions, nested breakpoints, and an...
US-1,007,3758 Performance of a wrapped application
Systems, methods, and computer-readable media for securing a mobile device application using an application wrapper while preserving and/or improving...
US-1,007,3757 System and method for controlling computer performance
The computer performance control system includes a performance management unit, a performance integration unit, and an activation unit. A user initiates the...
US-1,007,3756 Optimizing a virtualized computing environment
A method and associated systems for optimizing a computing platform. A processor joins sets of configurable parameters into groups that each identifies a...
US-1,007,3755 Tracing source code for end user monitoring
Example embodiments relate to tracing source code for end user monitoring. In example embodiments, an application is monitored to obtain an interaction log,...
US-1,007,3754 Systems and methods for collecting, tracking, and storing system performance and event data for computing devices
A system is configured to track and store system and event data for various computing devices. The system is configured to associate the various computing...
US-1,007,3753 System and method to assess information handling system health and resource utilization
A method and information handling system configured to store, via a monitoring system data repository memory device, aggregate information handling system...
US-1,007,3752 Universal smart connection pad
The present invention is a pad for connecting a host device to a slave device through a slave adapter. The host may provide services to the slave, including...
US-1,007,3751 Determining cable connections in a multi-cable link
A method for determining cable connections identifies a plurality of cables connected to a link included in a first device. The method identifies a first cable...
US-1,007,3750 Serial data link measurement and simulation system
A serial data link measurement and simulation system for use on a test and measurement instrument presents on a display device. A main menu having elements...
US-1,007,3749 Fault tolerant industrial automation control system
A combination of a component-based automation framework, software-based redundancy patterns, and a distributed, reliable runtime manager, is able to detect host...
US-1,007,3748 Failover system and method of deciding master-slave relationship therefor
A failover system and a method of deciding master-slave relationship therefor are provided. The failover system includes a first electronic device, a second...
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