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Searching: computer memory
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| Patent # | Description |
|---|---|
| US-1,016,9820 |
Systems and methods for display notifications for routing of electronic
transaction processing results A computer implemented system and method are disclosed involving technological advancements in the processing of electronic transaction processing results. The... |
| US-1,016,9786 |
Method and apparatus for repurchasing items The present disclosure involves a system. The system includes a computer memory storage module configured to store executable computer programming code. The... |
| US-1,016,9749 |
Systems and methods for tracking and adjustment of electronic transaction
processing results A computer implemented system and method are disclosed involving technological advancements in the processing of electronic transaction processing results. The... |
| US-1,016,9740 |
Tag cloud buddy list for messaging contacts Embodiments of the present invention provide a method, system and computer program product for tag cloud buddy lists. In an embodiment of the invention, a... |
| US-1,016,9662 |
Remote biometric monitoring system Remote biometric monitoring systems may include a digital camera having a digital sensor, a processor, and a memory, all enclosed in a common housing. The... |
| US-1,016,9590 |
Apparatus and method for displaying computer health index The disclosure discloses an apparatus for displaying a computer health index comprising: a memory having instructions stored thereon; a processor to execute the... |
| US-1,016,9577 |
Systems and methods for detecting modification attacks on shared physical
memory The disclosed computer-implemented method for detecting modification attacks on shared physical memory may include (i) identifying a page frame of physical... |
| US-1,016,9563 |
Encryption authorization dongle having volatile memory Embodiments of the present invention disclose a method, computer program product, and device for accessing encrypted data. A communication link may be... |
| US-1,016,9557 |
Picture/gesture password protection A system and a computer program product are provided for identifying a strength of an input picture password formed by performing a sequence of gestures... |
| US-1,016,9499 |
Thermoset resin flow models for printed circuit board laminates In an example, a method includes storing thermoset resin rheology data associated with a thermoset resin at a memory. The thermoset resin rheology data includes... |
| US-1,016,9455 |
Systems and methods for addressing a media database using distance
associative hashing A system, method and computer program utilize a distance associative hashing algorithmic means to provide a highly efficient means to rapidly address a large... |
| US-1,016,9422 |
Method and device for displaying process information The present invention discloses a method and a device for displaying process information, which belongs to the field of computer technologies. The method may... |
| US-1,016,9412 |
Selectivity estimation for query execution planning in a database A computer-implemented method of estimating selectivity of a query may include generating, for data stored in a database in a memory, a one-dimensional value... |
| US-1,016,9406 |
Managing sparsity in an multidimensional data structure Embodiments of the present invention relate to a method, program product, and system for managing the percentage of unpopulated cells in a multidimensional data... |
| US-1,016,9332 |
Data analysis for automated coupling of simulation models A distributed computer system includes a distributed processor, a distributed memory, and a simulation engine (SE). The SE includes a simulation I/O coupler... |
| US-1,016,9263 |
Memory subsystem and computer system A method including estimating an access request frequency from a CPU to a memory subsystem by counting a number of CPU access requests and a number of requests... |
| US-1,016,9254 |
Increasing virtual-memory efficiencies Embodiments of techniques and systems for increasing efficiencies in computing systems using virtual memory are described. In embodiments, instructions which... |
| US-1,016,9252 |
Configuring functional capabilities of a computer system Provided is a method for configuring the functional capabilities of a computer system. The computer system may include a persistent memory and a replaceable... |
| US-1,016,9249 |
Adjusting active cache size based on cache usage Provided are a computer program product, system, and method for adjusting active cache size based on cache usage. An active cache in at least one memory device... |
| US-1,016,9248 |
Determining cores to assign to cache hostile tasks Provided are a computer program product, system, and method for determining cores to assign to cache hostile tasks. A computer system has a plurality of cores.... |
| US-1,016,9244 |
Controlling access to pages in a memory in a computing device The described embodiments perform a method for handling memory accesses by virtual machines in a computing device. The described embodiments include a reverse... |
| US-1,016,9241 |
Managing memory allocation between input/output adapter caches A first cache of a first IOA is detected storing an amount of data that satisfies a memory shortage threshold. A request for extra memory for the first IOA is... |
| US-1,016,9238 |
Memory access for exactly-once messaging A computer-implemented method is provided for enabling exactly-once messaging. The computer-implemented method includes transmitting a plurality of messages... |
| US-1,016,9237 |
Identification of a computing device accessing a shared memory A method for identifying, in a system including two or more computing devices that are able to communicate with each other, with each computing device having... |
| US-1,016,9234 |
Translation lookaside buffer purging with concurrent cache updates A method and computer processor performs a translation lookaside buffer (TLB) purge with concurrent cache updates. Each cache line contains a virtual address... |
| US-1,016,9233 |
Translation lookaside buffer purging with concurrent cache updates A method and computer processor performs a translation lookaside buffer (TLB) purge with concurrent cache updates. Each cache line contains a virtual address... |
| US-1,016,9231 |
Efficient and secure direct storage device sharing in virtualized
environments A method, system and computer program product are disclosed for direct storage device sharing in a virtualized environment. In an embodiment, the method... |
| US-1,016,9198 |
Aggregating data for debugging software A method for obtaining data to debug an issue that affects a software application. In an embodiment, the method includes at least one computer processor... |
| US-1,016,9196 |
Enabling breakpoints on entire data structures Enabling breakpoints on entire data structures include methods, systems, and computer program products for setting breakpoints on a plurality of memory... |
| US-1,016,9181 |
Efficient validation of transactional memory in a computer processor A transactional memory test tests a transactional memory system on a computer processor. A test case with a transactional memory test is constructed such that... |
| US-1,016,9172 |
Passive detection of live systems during controller failover in
distributed environments For passive detection of live systems during controller failover in a distributed environment, a set of member systems is sorted according to heartbeat periods... |
| US-1,016,9157 |
Efficient state tracking for clusters Exemplary method, system, and computer program product embodiments for efficient state tracking for clusters are provided. In one embodiment, by way of example... |
| US-1,016,9153 |
Reallocation in a dispersed storage network (DSN) A computing device includes an interface configured to interface and communicate with a dispersed storage network (DSN), a memory that stores operational... |
| US-1,016,9130 |
Tailoring diagnostic information in a multithreaded environment Tailoring diagnostic information specific to current activity of multiple threads within a computer system. A request to dump system state is received. A system... |
| US-1,016,9129 |
Dispersed B-tree directory trees A computing device includes an interface configured to interface and communicate with a dispersed storage network (DSN), a memory that stores operational... |
| US-1,016,9107 |
Almost fair busy lock The present invention provides a method, a system, and a computer program product of preventing thread monitoring preemptions in an almost fair busy lock. In an... |
| US-1,016,9087 |
Technique for preserving memory affinity in a non-uniform memory access
data processing system Techniques for preserving memory affinity in a computer system is disclosed. In response to a request for memory access to a page within a memory affinity... |
| US-1,016,9066 |
System and method for enhancing advanced driver assistance system (ADAS)
as a system on a chip (SOC) A system on chip (SoC) having an integrated circuit (IC) integrating into a single chip advance driver assistance systems (ADAS) processing unit(s), application... |
| US-1,016,9025 |
Dynamic management of software load at customer premise equipment device Methods, systems, and computer readable media can be operable to facilitate the dynamic management of the software load at a customer premise equipment device.... |
| US-1,016,9014 |
Compiler method for generating instructions for vector operations in a
multi-endian instruction set A compiler includes a vector instruction processing mechanism that generates instructions for vector instructions in a way that assures correct operation in a... |
| US-1,016,9010 |
Performing register promotion optimizations in a computer program in
regions where memory aliasing may occur... Processor hardware detects when memory aliasing occurs, and assures proper operation of the code even in the presence of memory aliasing. Because the hardware... |
| US-1,016,8961 |
Hardware transaction transient conflict resolution In an approach for resolving terminated transactions in a transactional memory environment, a processor initiates a hardware transaction in a computing... |
| US-1,016,8957 |
Directed placemat of data in memory A method of storing computer executable instructions and data elements of a program in a plurality of memory blocks of an embedded system. The method includes... |
| US-1,016,8954 |
System and method of interfacing co-processors and input/output devices
via a main memory system A system for interfacing with a co-processor or input/output device is disclosed. According to one embodiment, the system includes a computer processing unit, a... |
| US-1,016,8950 |
Coordination of connection initiation scheduling in a distributed storage
network (DSN) A dispersed storage network (DSN) include multiple distributed computing systems distributed across time zones, each including a DSN memory. A global scheduling... |
| US-1,016,8923 |
Coherency management for volatile and non-volatile memory in a
through-silicon via (TSV) module An aspect includes coherency management between volatile memory and non-volatile memory in a through-silicon via (TSV) module of a computer system. A plurality... |
| US-1,016,8922 |
Volatile and non-volatile memory in a TSV module An aspect includes data backup management between volatile memory and non-volatile memory in a through-silicon via module of a computer system. Data is copied... |
| US-1,016,8911 |
Defragmentation of persistent main memory Disclosed herein are system, method, and computer program product embodiments for defragmentation of persistent main memory (e.g., storage class memory). An... |
| US-1,016,8904 |
Quasi-error notifications in a dispersed storage network Methods for use in a dispersed storage network (DSN) to retrieve encoded data from memory device of an impaired storage unit. In various examples, a computing... |
| US-1,016,8890 |
Document content reordering for assistive technologies by connecting
traced paths through the content Embodiments of the present invention provide a method, system and computer program product for document content re-ordering for assistive technology processing.... |
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