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Searching: computer memory





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Patent # Description
US-9,400,962 Architecture for distributed, parallel crawling of interactive client-server applications
In one embodiment, a distributed computing system includes a first worker node configured to execute a first job, a second worker node configured to execute a...
US-9,400,890 Method and devices for selective RAM scrambling
A method for selectively scrambling data within a memory associated with a computing device based on data tagging. The computing device may define security...
US-9,400,885 Computer security systems and methods using virtualization exceptions
Described systems and methods enable a host system to efficiently perform computer security activities, when operating in a hardware virtualization ...
US-9,400,824 Systems and methods for sorting data
Systems and methods for sorting data are disclosed. In some implementations, a method of sorting a set of data includes, at a computing device including one or...
US-9,400,823 Stream data processing method on recursive query of graph data
A stream data processing computer comprises: a query execution module to receive an input stream of stream data, manage execution order of operators for...
US-9,400,815 Method of two pass processing for relational queries in a database system and corresponding database system
Certain example embodiments concern a computer-implemented method of processing a relational query in a database system. The relational query addresses a...
US-9,400,764 Addressing, command protocol, and electrical interface for non-volatile memories utilized in recording usage counts
Electrical interfaces, addressing schemes, and command protocols allow for communications with memory modules in computing devices such as imaging and printing...
US-9,400,759 Cache load balancing in storage controllers
Methods and structure are provided for cache load balancing in storage controllers that utilize Solid State Drive (SSD) caches. One embodiment is a storage...
US-9,400,753 Control system, control method, and computer program product
According to an embodiment, a control system includes a detector, an estimating unit, a determining unit, and a controller. The detector detects an idle state....
US-9,400,751 Counter-based wide fetch management
Embodiments relate to counter-based wide fetch management. An aspect includes assigning a counter to a first memory region in a main memory that is allocated to...
US-9,400,744 Magnetic random access memory journal for multi-level cell flash memory
A flash memory system comprises a logic block interface operable to receive a write command from a host computer, the write command specifying data and a write...
US-9,400,686 Process grouping for improved cache and memory affinity
A multiprocessor computer system and method for use therein are provided for assigning processes to processor nodes. The system can determine a first pair of...
US-9,400,674 Managing virtual machine instances utilizing a virtual offload device
Generally described, the present application relates to systems and methods for the managing virtual machines instances using a physical computing device and an...
US-9,400,668 Computer program product containing instructions for providing a processor the capability of executing an...
An integrated circuit card is used with a terminal. The integrated circuit card includes a memory that stores an interpreter and an application that has a high...
US-9,400,667 String cache file for optimizing memory usage in a Java virtual machine
A method, system and computer program product for optimizing memory usage associated with duplicate string objects in a Java virtual machine. The method...
US-9,400,664 Method and apparatus for offloading storage workload
An aspect of the invention is directed to a storage management computer for managing offloading of storage workload between a storage controller of a storage...
US-9,400,603 Implementing enhanced performance flash memory devices
A method and apparatus for implementing enhanced performance in a flash memory system in a computer system. A flash memory chip includes a function engine...
US-9,400,588 Supporting display of context menus in both cascaded and overlapping styles
A computing system provided according to an aspect of the present invention contains a server system operable to send a same hierarchical menu to client systems...
US-9,400,550 Apparatus and method providing viewer feedback of observed personal user data
In one or more embodiments described herein, there is provided an apparatus comprising a processor and a memory including computer program code. The memory and...
US-9,400,511 Methods and control systems of resistance adjustment of resistors
Embodiments include methods, computer systems and computer program products for controlling resistance value of a resistor in a circuit. Aspects include:...
US-9,399,465 Predictive cruise control system with selectable speed control bands
An on-board vehicle computer system for a vehicle includes at least one processing unit and a memory having stored therein computer-executable instructions...
US-9,398,867 Efficient activity classification from motion inputs
A device worn by a human performing a method using accelerometer data to classify human activities is disclosed. The method uses memory and computation...
US-9,398,390 DJ stem systems and methods
Systems and methods selectively mix a first and second song together during a live performance. The first song has a plurality of first stems, each having...
US-9,398,162 Systems and methods for playing recorded announcements
The invention features a computer-implemented method for playing back an announcement message to a user device. The method includes initiating, by a computing...
US-9,398,094 Data transfer device
When a checkpoint comes, the control section selects some of a plurality of small areas which are transfer targets in the memory as small areas to be...
US-9,397,888 Method and a server for assisting a centralized initialization of a radio access node
It is presented a user equipment (20), UE for assisting a centralized initialization of a radio access node (10). The UE (20) comprises a communication...
US-9,397,859 Sideband control of e-mail message decryption
Embodiments of the present invention provide a method, system and computer program product for sideband control of a secured e-mail message. In an embodiment of...
US-9,397,788 Proxy based data transfer utilizing direct memory access
A method for transferring data utilizing direct memory access. The method includes a computer processor establishing a networking connection, using a proxy,...
US-9,396,525 Method for real time video processing involving changing a color of an object on a human face in a video
A computer-implemented method for real time video processing for changing a color of an object in a video is presented. The method is performed in connection...
US-9,396,411 Method and system for generating intrinsic images using a single reflectance technique
An automated, computerized method is provided for processing an image. The method includes the steps of providing an image file depicting an image, in a...
US-9,396,369 Electronic tag transmissions corresponding to physical disturbance of tag
In some embodiments, a seal is provided that includes an adhesive bottom layer, a non-adhesive top layer, and an electronic tag. The electronic tag can be...
US-9,396,239 Compiling method, storage medium and compiling apparatus
A compiling method for reading, by a computer comprising a processor and a memory, a source file therein and outputting an executable binary file, the compiling...
US-9,396,204 Data deduplication in a removable storage device
An apparatus and associated methodology contemplate a data storage system having a removable storage device operably transferring user data between the data...
US-9,396,164 Sparsity-driven matrix representation to optimize operational and storage efficiency
Embodiments of the invention relate to sparsity-driven matrix representation. In one embodiment, a sparsity of a matrix is determined and the sparsity is...
US-9,396,135 Method and apparatus for improving computer cache performance and for protecting memory systems against some...
A physical cache memory that is divided into one or more virtual segments using multiple circuits to decode addresses is provided. An address mapping and an...
US-9,396,134 Authorization logic in memory constrained security device
Architecture that utilizes logical combinations (e.g., of Boolean logic) of authorizations as a logical authorization expression that is computed through a...
US-9,396,129 Synchronous and asynchronous discard scans based on the type of cache memory
A computational device maintains a first type of cache and a second type of cache. The computational device receives a command from the host to release space....
US-9,396,125 Dynamic management of memory ranges exempted from cache memory access
A computer-implemented method for defining transient-access memory ranges of a block of memory includes retrieving, via a processor, a plurality of memory...
US-9,396,119 Device for controlling the access to a cache structure
The present disclosure relates to a device for controlling the access to a cache structure comprising multiple cache sets during the execution of at least one...
US-9,396,118 Efficient dynamic randomizing address remapping for PCM caching to improve endurance and anti-attack
A method, including monitoring, by a remapping manager, a system state of a computing device for the occurrence of a predefined event, detecting, by the...
US-9,396,112 Hierarchical write-combining cache coherence
A method, computer program product, and system is described that enforces a release consistency with special accesses sequentially consistent (RCsc) memory...
US-9,396,110 Non-volatile hybrid memory
Memory units and computer systems are provided. The computer systems include a memory unit. The memory unit includes a stable storage unit, an unstable storage...
US-9,396,109 Method and apparatus for DRAM spatial coalescing within a single channel
Aspects include computing devices, systems, and methods for reorganizing the storage of data in memory to energize less than all of the memory devices of a...
US-9,396,104 Accessing compressed data of varying-sized quanta in non-volatile memory
Accessing data of varying-sized quanta in non-volatile memory provides improved storage efficiency in some situations. For example, a Solid-State Disk (SSD)...
US-9,396,101 Shared physical memory protocol
A computer implemented program product and data processing system for receiving data to a targeted logical partition. A computer locates buffer element in...
US-9,396,070 System and method for system-on-a-chip subsystem external access detection and recovery
Systems and methods for external access detection and recovery in a subsystem of a system-on-a-chip (SoC) in a portable computing device (PCD) are presented. In...
US-9,396,011 Algorithm and apparatus to deploy virtual machine monitor on demand
In the various aspects, virtualization techniques may be used to improve performance and reduce the amount of power consumed by selectively enabling a...
US-9,395,982 Atomic memory operations on an N-way linked list
Computer-implemented methods for pushing or popping an element on to of off of an N-way linked list in a computer memory may include one or more atomic memory...
US-9,395,968 Uniquely identifying and validating computer system firmware
Methods, apparatus, computer systems, and computer-readable media for creating a firmware identification data structure in a memory device for identifying and...
US-9,395,964 Rewriting symbol address initialization sequences
A system includes a memory to store a linker and one or modules, and a processor, communicatively coupled to the memory. The computer system is configured to...
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