| United States Patent | RE35,353 |
| Tokita , et al. | October 22, 1996 |
A process for manufacturing a multi-layer lead frame for a semiconductor device comprises two metal plains being adhered to each other via an insulation piece. An insulation strip is punched to cut the insulation piece, which is preliminary adhered to a metal strip. The metal strip is then punched to cut and remove the metal plane, which is then laminated and heat-pressed to another metal strip. After completely adhered, the other metal strip is punched to remove a multi-layer lead frame.
| Inventors: | Tokita; Masakuni (Nagano, JP), Kobayashi; Akira (Nagano, JP), Yamakawa; Shinichi (Nagano, JP), Shimizu; Mitsuharu (Nagano, JP), Masuda; Norihiro (Nagano, JP) |
| Assignee: |
Shinko Electric Ind. Co, Ltd.
(Nagano,
JP)
Intel Corporation (Santa Clara, CA) |
| Appl. No.: | 08/314,311 |
| Filed: | September 28, 1994 |
| Application Number | Filing Date | Patent Number | Issue Date | ||
| 701182 | May., 1991 | ||||
| Reissue of: | 960575 | Oct., 1992 | 05231756 | Aug., 1993 | |
| Current U.S. Class: | 29/830 ; 156/261; 29/25.01; 29/429 |
| Current International Class: | H01L 23/495 (20060101); H01L 23/48 (20060101); H01L 21/02 (20060101); H01L 21/48 (20060101); B32B 031/18 (); H05K 003/36 () |
| Field of Search: | 29/827,830,831,843,429,430,25.01 156/250,252,253,256,261,516,518,530 361/395,398,412,417,421 357/80 |
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Patent Abstracts of Japan, vol. 010, No. 347, (E-457), Nov. 21, 1986 and JP-A-61,150,253 (Furukawa Electric Co., Ltd.), Jul. 8, 1986. . Proceedings of the 1989 Japan International Electronics Symposium, Apr. 26, 1989, NARA, Japan, pp. 221-229, D. Mallik et al., "Multi-Layer Molded Plastic Package".. |