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Architecture for TCAM sharing
Aspects of the disclosure provide a packet processing system. The packet processing system includes a plurality of processing units, a ternary content...
In-memory aggregation system and method of multidimensional data
processing for enhancing speed and scalability
An in-memory aggregation (IMA) system having a massive parallel hardware (HW) accelerated aggregation engine uses the IMA for providing maximal utilization of...
Table organization using one or more queries
A method, system and computer program product are provided for reorganizing a database table according to a set of queries. More specifically, the table is...
System and method for an accelerator cache based on memory availability
The storage processor of a data storage system such as a storage array automatically configures one or more accelerator caches ("AC") upon detecting the...
Counter-based wide fetch management
Embodiments relate to counter-based wide fetch management. An aspect includes assigning a counter to a first memory region in a main memory that is allocated to...
Salvaging lock elision transactions
A transactional memory system salvages hardware lock elision (HLE) transactions. A computer system of the transactional memory system records information about...
Low power computation architecture
An embodiment includes a system, comprising a first memory; a plurality of first circuits, wherein each first circuit is coupled to the memory; and includes a...
System, method, and computer program product for optimizing the management
of thread stack memory
A system, method, and computer program product for optimizing thread stack memory allocation is disclosed. The method includes the steps of receiving source...
Runtime for automatically load-balancing and synchronizing heterogeneous
computer systems with scoped...
Sharing tasks among compute units in a processor can increase the efficiency of the processor. When a compute unit does not have a task in its task memory to...
System and method for managing network navigation
A file comprising an application and data corresponding to a status of the application at a particular time is maintained in a first memory of a user device,...
System and method for barrier command monitoring in computing systems
A computing system for handling barrier commands includes a memory, an interface, and a processor. The memory is configured to store a pre-barrier spreading...
Method and apparatus for enhancing a hibernate and resume process for a
computing device having an external...
Before hibernating a computing device (102), system software components (116) are notified of an upcoming hibernation process. The notifications are conveyed...
Operand fetching control as a function of branch confidence
Data operand fetching control includes a computer processor that includes a control unit for determining memory access operations. The control unit is...
Semi-exclusive second-level branch target buffer
Embodiments relate to a semi-exclusive second-level branch target buffer. An aspect includes a computer-implemented method for a semi-exclusive second-level...
System and method for removal of arraycopies in java by cutting the length
A system and method for removal of array copies in Java by reusing a source array for the target array and potentially cutting the length of the source array....
Snapshots and versioning of transactional storage class memory
A system and method enables efficient implementation of snapshots of data organized as arbitrary data structures on a byte-addressable persistent memory of a...
Method and apparatus for embedded systems reprogramming
A reprogramming device is used for reprogramming embedded systems. The reprogramming device comprises a microprocessor, a memory programmed with software to...
Implementing enhanced performance flash memory devices
A method and apparatus for implementing performance in a flash memory system in a computer system. A flash memory chip includes a function engine performing...
Method, computer program product and apparatus for accelerating responses
to requests for transactions...
Responding to IO requests made by an application to an operating system within a computing device implements IO performance acceleration that interfaces with...
Systems and methods for generating a secure locking interface
Systems and methods for generating a secure locking interface on a touch-screen display of a computing device are disclosed. The system comprises a processor, a...
Input device with a customizable contour
Certain embodiments of the invention include an input device (e.g., a computer mouse) including a processor, a housing including a top side, the housing...
Synchronization in a computing device
One embodiment provides an apparatus. The apparatus includes a processor, a chipset, a memory to store a process, and logic. The processor includes one or more...
User configurable vehicle steering column stalks
A user-configurable steering column is made from steering column-mounted switches, each of which is coupled to a computer, which is also coupled to various...
Process scheduling system, method, and program
System, method and computer program product for combined scheduling of two different slab sequences by a rational technique. A two-dimensional grid graph having...
Evolving serial comparison system with critical alert notifications
A system for serial comparison of physiological data, including: a controller; a user interface; and a memory including instructions that, when executed by the...
Flexible measurements in unlicensed band
The specification and drawings present a new method, apparatus and software related product (e.g., a computer readable memory) for implementing enhanced and...
Adaptive codec selection
A computing system is disclosed and may include a processor, a plurality of video processing tools, and memory. The plurality of video processing tools include...
System, method and computer program product for processing image data
A method for processing a first image having associated location data is provided. In one embodiment, the method comprises determining that a location alias...
Mobile communication devices collaborative power management
A mobile phone that coordinates power management across multiple communication devices. The mobile phone comprises a processor, a memory, long-range and...
System and method for detecting malicious code in random access memory
Disclosed are system and method for detecting malicious code in random access memory. An exemplary method comprises: detecting, by a hardware processor, a...
Monitoring of residual encrypted data to improve erase performance on a
In one embodiment, a system includes a processor and logic integrated with and/or executable by the processor, the logic being configured to: determine a...
Method and apparatus for efficient i-vector extraction
Most speaker recognition systems use i-vectors which are compact representations of speaker voice characteristics. Typical i-vector extraction procedures are...
Method for estimation of occlusion in a virtual environment
A method for estimating occlusion in a virtual environment comprising at least two objects and observed from a viewpoint. Thereafter, a second item of...
System and method for real-time image registration
A method for image registration includes the steps of: providing a computer and an imager; acquiring and processing a reference image frame including a...
Method, apparatus and system for localizing a spine
A method and a corresponding apparatus and system localizes a spine in an image, in particular a computed tomography (CT) image, of a human or animal body,...
Method and apparatus for locating information from surroundings
An apparatus includes at least one a processor, and at least one memory including computer program code, the at least one memory and the computer program code...
External access to memory on an RFID tag
In embodiments of the present invention improved capabilities are described for an RFID tag comprising a radio frequency (RF) network node and a communication...
Data processing on a non-volatile mass storage device
A non-volatile mass storage device is provided comprising memory circuitry accessible to a host data processing device via a communication link. The...
Method for defending against cold-boot attacks on a computer in a
A method to defend effectively against cold-boot attacks includes checking state data stored in a state memory to which the system software has access. At least...
Method and apparatus of performing data executable integrity verification
Disclosed are an apparatus and method of verifying an application installation procedure. One example method of operation may include receiving an application...
Database system and method
A method, computer program product, and computer system for a database system and method. In some embodiments, metadata associated with data stored in a...
System, method and data structure for fast loading, storing and access to
huge data sets in real time
A computerized system including a processor and a computer-readable non-transient memory in communication with the processor, the memory storing instructions...
Host computer and method for managing SAS expanders of SAS expander
In a method for managing serial attached small computer system interface (SAS) expanders using a host computer, the host computer connects to an SAS expander...
Translation lookaside buffer
The described embodiments include a translation lookaside buffer ("TLB") that is used for performing virtual address to physical address translations when...
Systems and methods for optimizing computer performance
In one embodiment, a method includes initiating execution of an application, the application utilizing a hash table data structure to map a plurality of keys to...
Cache modeling using random sampling and a timestamp histogram
A system and method for determining an optimal cache size of a computing system is provided. In some embodiments, the method comprises selecting a portion of an...
Method, apparatus, system for handling address conflicts in a distributed
memory fabric architecture
Method, apparatus and system for handling address conflicts in distributed memory fabrics. Memory access requests originating from caching agents and...
Dynamic tuning of internal parameters for solid-state disk based on
workload access patterns
A system and method for tuning a solid state disk memory includes computing a metric representing a usage trend of a solid state disk memory. Whether one or...
Map recycling acceleration
An apparatus having a processor and a circuit is disclosed. The processor is generally configured to initiate an operation to recycle a plurality of source...
At risk data caching (ARDC)
A method, computer program product, and computing system for sensing the occurrence of an degraded condition within a data stripe of a RAID array. The data...