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Local emulation of data RAM utilizing write-through cache hardware within a
In a processor module having a local software visible data memory and a write through cache connected to an external memory space external to the processor...
Measuring current on a die
Disclosed are various systems, methods, and programs embodied in computer readable mediums for measuring current in a central processor unit (CPU) package. To...
Central processing unit including address generation system and instruction
A disclosed address generation system includes a decrementer and a multiplexer. The decrementer produces a decremented address signal by subtracting a first...
Communication system utilizing host signal processing
The system utilizes host signal processing techniques applicable to cellular communication system devices which are integrated with a system incorporating a...
Apparatus and method for verifying memory coherency of duplication
An apparatus for verifying memory coherency of a duplication processor having a symmetrical structure includes: an active processor in which a standby memory...
Data transfer scheme in a communications system incorporating multiple
A novel data transfer scheme for efficiently transferring data between multiple data generating processing units in a processing element wherein each processing...
Memory management system and method providing increased memory access
A memory management unit (MMU) is disclosed for managing a memory storing data arranged within a multiple memory pages. The memory management unit includes a...
Video, audio and graphics decode, composite and display system
A video, audio and graphics system uses multiple transport processors to receive in-band and out-of-band MPEG Transport streams, to perform PID and section...
Audio, fax and modem capabilities with a digital signal processor of a
sound card of a computer system
An optional card including a digital signal processor (DSP) for use by a modem daughter board, where the modem daughter board is equipped with a data access...
Method and apparatus for controlling external devices through address
A data processing system and a data processor in which the control information for controlling an external device, especially, a device having a PCMCIA interface...
SMM loader and execution mechanism for component software for multiple
A method and system that enables executable content in the form of one or more software drivers or firmware volumes to be loaded into the System Management Mode...
Arbitration technique based on processor task priority
A computer system including multiple CPUs inform other logic in a computer system as to the priority level (e.g., task priority) associated with the CPU or...
Misfire detection system and method of median filtering
A processor having an embedded median filter routine, a method of median filtering using a vehicle's CPU, and a misfire detection system for an internal...
CPU utilization measurement techniques for use in power management
A computer system that has multiple performance states periodically obtains utilization information for a plurality of tasks operating on the processor and...
Data transmission method and card therefor
A portable article of the smart card type and a method of transmitting data to such an article. The article comprises an article body and an integrated circuit...
Method of loading initial program in processor system
In a processor system having a CPU, a RAM, and a communication portion for external communication, the operation of the central processing unit is stopped when...
Power management integrated circuit for overriding an internal frequency ID
code of a processor and for...
An integrated circuit includes voltage identification (VID) logic and frequency identification logic (FID) for a CPU, as well as power good circuitry for...
Architecture for a processor complex of an arrayed pipelined processing
A processor complex architecture facilitates accurate passing of transient data among processor complex stages of a pipelined processing engine. The processor...
Method and system for testing a processor
A method for verifying the correctness of the functional behavior of a processor cooperating with software is provided. Furthermore, the method allows...
CPU power management based on utilization with lowest performance mode at
the mid-utilization range
A demand-based method and system of central processing unit power management. The utilization of a central processing unit (CPU) during a sampling time interval...
Methods and apparatus for decoding images using dedicated hardware
circuitry and a programmable processor
Video decoder methods and apparatus are described. In accordance with the invention, hardware decoder circuitry, e.g., intra-coded image decoding circuitry and...
Information processing apparatus
A mobile telephone 10 in accordance with the present invention includes a BBE unit 21 with a host CPU 11 as a core, an application unit 26 with an application...
Programmable thermostat system employing a touch screen unit for intuitive
interactive interface with a user
A programmable thermostat system for controlling space conditioning equipment includes: a transparent touch pad juxtaposed over a liquid crystal display to...
System and method for dynamically adjusting to CPU performance changes
In a computer system having a processor capable of operating at a plurality of performance states, including a first and a second performance state, wherein...
Reader-writer lock for multiprocessor systems
A reader-writer lock minimizes writer and reader overhead by employing lock structures that are shared among groups of processors that have lower latencies. In...
PC-CPU motherboards with common fault-tolerant power supply
Processor modules (2) are supported side-by-side with one another to slide in and out of a cabinet (1) on tracks (6, 7), each module (2) including a PC-CPU...
Hardware based utilization metering
A hardware based utilization metering device, and a corresponding method are used in a computer system having one or more central processor units (CPUs) to...
High efficiency heat sink/air cooler system for heat-generating components
A high efficiency two-part heat sink and air cooler apparatus or system for heat generating components, such as CPUs (central processing units) or the like...
Hybrid RF/optical acquisition and tracking system and method
A hybrid optical and millimeter wave beam acquisition and tracking system and method. A host platform includes an INS and a GPS for generating geolocation data,...
Data processor and data processing system
A data processor includes the normal mode providing narrow access space of CPU and the advance mode providing wide access space. Even in the normal mode, the...
Storage system and method for data transfer between storage systems
There is realized a storage system which can reduce the limitation of a device number used by a host CPU at the time of duplexing data. A micro processor of a...
Memory system allowing fast operation of processor while using flash memory
incapable of random access
A DMA control circuit controls DMA transfer between a flash memory and a main memory. An S/P bus conversion circuit converts serial data output from the flash...
Game system with graphics processor
The present invention relates to the architecture and use of a computer system optimized for the efficient modeling of graphics. The computer system has a...
Method and apparatus for detecting pipeline address conflict using compare
of byte addresses
In a computer processor, a low-order portion of a virtual address for a pipelined operation is compared directly with the corresponding low-order portions of...
Method and apparatus to directly access a peripheral device when central
processor operations are suspended
A method and apparatus for facilitating direct access to computer resources by a peripheral device while the computer's CPU is in a sleeping state. A peripheral...
Method for accelerating the speed of a CPU using a system command having an
operation not associated with...
A computer system supports operation of a CPU at multiple clock speeds. Logic in the computer system predicts the performance requirements of the CPU, and...
Multimedia processor employing a shared CPU-graphics cache
A highly integrated multimedia processor employs a shared cache between tightly coupled central processing and graphics units to provide the graphics unit access...
Host CPU independent video processing unit
The present invention relates to a video display processor comprised apparatus for receiving digital input signal components of a signal to be displayed,...
Replacement of externally mounted user interface modules with software
emulation of user interface module...
The present invention is a method and apparatus for implementing in embedded software the functionality of one or more external user interface circuits either in...
Acoustic echo cancellation equipped with howling suppressor and double-talk
An acoustic echo canceller (AEC) is devised and tested in a real environment. The devised AEC puts together a number of available digital signal processing...
CPU power sequence for large multiprocessor systems
A computer system includes a power supply coupled to a control logic, the power supply including a power_good output signal and Power output lines. The...
Method and apparatus for providing continued operation of a multiprocessor
computer system after detecting...
A multiprocessor computer system continues operation after the failure of a cooling device coupled to a central processing unit (CPU). In accordance with the...
Real-time method for bit-reversal of large size arrays
A digital signal processor DSP for bit-reversal of a large data array of a size has a direct memory access (DMA) controller for performing in-place bit reversal...
Cooling duct for computer
A duct, for channeling air from outside of a personal computer (PC) to cool a processor (CPU) of the PC, has a hollow body. This body comprises spaced apart...
Visual messaging system for high-speed networks
The present invention provides a visual messaging device for use with a high speed network. The message data is communicated to the network by a remote device,...
Floating point unit pipeline synchronized with processor pipeline
An FPU pipeline is synchronized with a CPU pipeline. Synchronization is achieved by having stalls and freezes in any one pipeline cause stalls and freezes in the...
Gateway with voice
In one aspect of the present invention, a network gateway is configured to facilitate on line and off line bi-directional communication between a number of near...
Variable clock cycle for processor, bus and components for power management
in an information handling system
A computer system that is able to switch processor and bus frequencies, along with processor voltage, when the system is placed into AC from battery power mode,...
Split embedded DRAM processor
A processing architecture includes a first CPU core portion coupled to a second embedded dynamic random access memory (DRAM) portion. These architectural...
Multi-mode processor bus bridge
A processor bus bridge includes a buffer space disposed between a first bus and a second bus. The first bus is operated in a first mode by a first processor and...